1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a method of generating an initializing signal capable of preventing unstable operations of inner circuits when a semiconductor memory device is powered on.
2. Description of the Related Art
Power-up is to apply external electric power to a semiconductor memory device for operating the same. A semiconductor memory device includes an initializing circuit in order to prevent inner circuits from being unstably operated during power-up. Here, the unstable operations of the inner circuits mean that whether data in a circuit is logic ‘high’ or logic ‘low’ is difficult to be determined in a power-up operation section because external electric power is not completely stabilized. The unstable operations of the inner circuits can be prevented by latching the inner circuits through an initializing signal that is temporarily logic ‘high’ but drops to logic ‘low’ during the power-up.
FIG. 1 is a view of an initializing circuit 100 capable of preventing unstable operations of inner circuits of a semiconductor memory device upon power-up. Referring to FIG. 1, the initializing circuit 100 includes a PMOS transistor MP1, a capacitor CAP, a resistor R1 and inverters I11 through I13. In the operation of the initializing circuit 100, an initializing signal VCCHB output from the initializing circuit 100 becomes larger due to an increase in a voltage level when external electric power EVC from an outer source is applied to the initializing circuit 100 and the voltage level of the external electric power EVC is raised. If the voltage level of the external electric power EVC is above a predetermined level, the voltage of the initializing circuit 100 is adjusted so that a first node N11 becomes a logic ‘high’ level. Once the first node N11 is recognized as logic ‘high’, the initializing signal VCCHB is generated to be logic ‘low’ by the inverters I11 through I13. Here, the initializing pulse signal VCCHB is used for preventing unstable operation of the inner circuits of a semiconductor memory device during power-up operation.
FIG. 2 shows an example of a method of initializing the inner circuits of a semiconductor memory device using an initializing signal. In the operation of the circuit shown in FIG. 2, an input signal IN is inactive during power-up, and therefore a first node N21 is in an unstable state. At this time, when a logic ‘high’ initializing signal VCCHB is input, a PMOS transistor MP2 is turned on by an inverter I21 and the first node N21 is latched to the logic ‘high’ level and stabilized. As a result, variations in an output signal OUT can be prevented. When the initializing signal VCCHB is transited to the logic ‘low’ level, the PMOS transistor MP2 is turned off and the first node N21 remains latched to the logic ‘high’ level. As described above, the initializing signal VCCHB sets each of the nodes of the inner circuit of a semiconductor memory device to a predetermined logic level upon power-up.
However, the initializing circuit 100 has problems in that it has a large layout area and consumes power while the semiconductor memory device operates, even after the initializing signal VCCHB is generated. Further, the current trend is to reduce the voltage of the external electric power EVC (to conserve power and increase speed), thus lessening a voltage level of the initializing signal VCCHB. This causes the initializing signal VCCHB to fail to fulfill the function of preventing unstable operation of the inner circuits.
In contrast, a method of generating an initializing signal according to the present invention can reduce the layout area and power consumption of an initializing circuit during power-up.